resolution of analog to digital converter

The resulting ADC clock should be between 32 khz and 13 MHz. Any factor between 1 and 128 can be chosen by writing to a value between 0 and 127 the PRESC bits in ADCn_CTRL.

Analog to Digital Converter Overview ADCn_STATUS ADCn_CTRL ADCn_CMD ADCn_SINGLECTRL ADCn_SCANCTRL ADCn_SINGLEDATA ADCn_SCANDATA Oversampling filter HFPERCLK ADCn Prescaler ADC_CLK Sequencer Result buffer ADCn_CH0 ADCn_CH1 ADCn_CH2 ADCn_CH3 ADCn_CH4 ADCn_CH5 ADCn_CH6 ADCn_CH7 Temp V DD/ Control SAR V DD V SS V ref/ 2 DAC0 DAC1 V DD 1.25 V 2.5 V 5 V differential 2x(VDD- VSS) an0021_revģ 2 General Operation.the world's most energy friendly microcontrollers 2.1 Clock Selection The ADC clock is supplied by an ADC-clock prescaler which divides the peripheral clock (HFPERCLK) by a selectable factor between 1 and 128. 2) illustrates the internal connections of the inputs, reference selection and registers. For sampling frequencies below a couple of kilohertz, this is the best way to do low power ADC sampling. For extremely low power periodic ADC sampling, a software example which enter EM2 between each ADC sample is also included. Offset and Gain Calibration of the ADC is also described and included in the software examples. Software examples of ADC operation both with DMA and PRS are included. In addition, advanced features and power saving techniques are described. This application note shows general operation and usage of the ADC. The ADC can be clocked at different speeds, and run at different warm-up modes to reduce the energy consumption even further. With the help of PRS and DMA, the ADC can operate without CPU intervention, minimizing current consumption or allow the core to do other work. The integrated input mux can select ADC-input from 8 external pins or 6 internal signals. The maximum resolution is 12 bits, and one million samples per second can be achieved at this resolution.

This application note includes: This PDF document Source files (zip) Example C-code Multiple IDE projectsĢ 1 Analog to Digital Converter 1.1 Introduction.the world's most energy friendly microcontrollers The EFM32 ADC is a Successive Approximation Register (SAR) architecture. Calibration routines for offset and gain are also included. Many aspects of the ADC, including inputs, references and the different operating modes are described. 1 Analog to Digital Converter AN Application Note Introduction This application note describes how to use the EFM32 Analog to Digital Converter to convert an analog input voltage to a digital value.

Resolution of analog to digital converter